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VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
14 years 8 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
ECRTS
2005
IEEE
14 years 1 months ago
Fast and Tight Response-Times for Tasks with Offsets
In previous work, we presented a tight approximate response-time analysis for tasks with offsets. While providing a tight bound on response times, the tight analysis exhibits simi...
Jukka Mäki-Turja, Mikael Nolin
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 4 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
13 years 11 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
KONVENS
2000
13 years 11 months ago
The RWTH Large Vocabulary Speech Recognition System for Spontaneous Speech
This paper presents details of the RWTH large vocabulary continuous speech recognition system used in the VERBMOBIL spontaneous speech translation system. In particular, we report...
Stephan Kanthak, Sirko Molau, Achim Sixtus, Ralf S...