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» Speeding up power estimation of embedded software
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ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 11 months ago
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ISORC
2007
IEEE
14 years 1 months ago
Time-Predictable Task Preemption for Real-Time Systems with Direct-Mapped Instruction Cache
Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded so...
Raimund Kirner, Peter P. Puschner
DAC
2002
ACM
14 years 8 months ago
Energy estimation and optimization of embedded VLIW processors based on instruction clustering
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
Andrea Bona, Mariagiovanna Sami, Donatella Sciuto,...
LCTRTS
2005
Springer
14 years 27 days ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean
CODES
2006
IEEE
14 years 1 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran