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» State machine models of timing and circuit design
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SOFSEM
2007
Springer
14 years 1 months ago
Games, Time, and Probability: Graph Models for System Design and Analysis
Digital technology is increasingly deployed in safety-critical situations. This calls for systematic design and verification methodologies that can cope with three major sources o...
Thomas A. Henzinger
WCE
2007
13 years 8 months ago
Automatic State Machine Induction for String Recognition
—One problem of generating a model to recognize any string is how to generate one that is generalized enough to accept strings with similar patterns and, at the same time, is spe...
Boontee Kruatrachue, Nattachat Pantrakarn, Kritawa...
TAICPART
2006
IEEE
134views Education» more  TAICPART 2006»
14 years 1 months ago
Integration Testing of Components Guided by Incremental State Machine Learning
The design of complex systems, e.g., telecom services, is nowadays usually based on the integration of components (COTS), loosely coupled in distributed architectures. When compon...
Keqin Li 0002, Roland Groz, Muzammil Shahbaz
DAC
2004
ACM
14 years 8 months ago
Statistical timing analysis based on a timing yield model
Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied ...
Farid N. Najm, Noel Menezes
DAC
2003
ACM
14 years 8 months ago
Support vector machines for analog circuit performance representation
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
Fernando De Bernardinis, Michael I. Jordan, Albert...