306 search results - page 19 / 62 » Statistical Delay Modeling in Logic Design and Synthesis |
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
CASES
2006
ACM
14 years 4 days ago
2006
ACM
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
ISPD
1999
ACM
14 years 22 days ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
When reconfigurable devices are used in modern embedded systems and their capability to adapt to changing application requirements becomes an issue, comprehensive modeling and de...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...