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» Statistical Delay Modeling in Logic Design and Synthesis
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EVOW
2001
Springer
14 years 27 days ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
DOLAP
2006
ACM
14 years 2 months ago
Towards a logical multidimensional model for spatial data warehousing and OLAP
Decision support systems (DSS) may be enhanced qualitatively if they are able to also deal with spatial dimensions and measures. Regardless the evident importance of using data wa...
Marcus Costa Sampaio, Andre Gomes de Sousa, Cl&aac...
DAC
2001
ACM
14 years 9 months ago
Latency-Driven Design of Multi-Purpose Systems-On-Chip
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
Seapahn Meguerdichian, Milenko Drinic, Darko Kirov...
DASFAA
2004
IEEE
169views Database» more  DASFAA 2004»
14 years 4 days ago
Statistic Driven Acceleration of Object-Relational Space-Partitioning Index Structures
Relational index structures, as for instance the Relational Interval Tree or the Linear Quadtree, support efficient processing of queries on top of existing object-relational datab...
Hans-Peter Kriegel, Peter Kunath, Martin Pfeifle, ...
DATE
2008
IEEE
161views Hardware» more  DATE 2008»
14 years 2 months ago
Spatial Correlation Extraction via Random Field Simulation and Production Chip Performance Regression
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
Bao Liu