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DATE
2008
IEEE
92views Hardware» more  DATE 2008»
14 years 2 months ago
Latch Modeling for Statistical Timing Analysis
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
Sean X. Shi, Anand Ramalingam, Daifeng Wang, David...
ICCAD
2006
IEEE
147views Hardware» more  ICCAD 2006»
14 years 4 months ago
Analysis and modeling of CD variation for statistical static timing
Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 4 months ago
A framework for statistical timing analysis using non-linear delay and slew models
Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrud...
DATE
2008
IEEE
204views Hardware» more  DATE 2008»
14 years 2 months ago
Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
Jun-Kuei Zeng, Chung-Ping Chen
DAC
2006
ACM
14 years 8 months ago
Statistical timing analysis with correlated non-gaussian parameters using independent component analysis
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
Jaskirat Singh, Sachin S. Sapatnekar