1534 search results - page 288 / 307 » Stochastic Bounds on Execution Times of Parallel Computation... |
SIAMCOMP
2000
13 years 7 months ago
2000
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
HPCA
1996
IEEE
13 years 11 months ago
1996
IEEE
This paper compares several implementations of entry consistency (EC) and lazy release consistency (LRC), two relaxed memory models in use with software distributed shared memory ...