Distributed processors must balance communication and concurrency. When dividing instructions among the processors, key factors are the available concurrency, criticality of depen...
Behnam Robatmili, Katherine E. Coons, Doug Burger,...
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
The Data-Flow Graph (DFG) of a parallel application is frequently used to take scheduling decisions, based on the information that it models (dependencies among the tasks and volu...
Rafael Ennes Silva, Guilherme P. Pezzi, Nicolas Ma...
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...
Lisane B. de Brisolara, Marcio F. da S. Oliveira, ...
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...