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ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 6 months ago
State re-encoding for peak current minimization
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
Shih-Hsu Huang, Chia-Ming Chang, Yow-Tyng Nieh
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 6 months ago
Importance of volume discretization of single and coupled interconnects
This paper presents figures of merit and error formulae to determine which interconnects require volume discretization in the GHZ range. Most of the previous work focused mainly o...
Ahmed Shebaita, Dusan Petranovic, Yehea I. Ismail
ICCAD
2006
IEEE
150views Hardware» more  ICCAD 2006»
14 years 6 months ago
Conjoining soft-core FPGA processors
Soft-core programmable processors on field-programmable gate arrays (FPGAs) can be custom synthesized to instantiate only those hardware units, such as multipliers and floating-po...
David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. ...
ICCAD
2005
IEEE
168views Hardware» more  ICCAD 2005»
14 years 6 months ago
Statistical timing analysis driven post-silicon-tunable clock-tree synthesis
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Jeng-Liang Tsai, Lizheng Zhang
ISQED
2009
IEEE
86views Hardware» more  ISQED 2009»
14 years 4 months ago
Uncriticality-directed scheduling for tackling variation and power challenges
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay has variability...
Toshinori Sato, Shingo Watanabe