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ASPDAC
2004
ACM
112views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Longest path selection for delay test under process variation
- Under manufacturing process variation, a path through a fault site is called longest for delay test if there exists a process condition under which the path has the maximum delay...
Xiang Lu, Zhuo Li, Wangqi Qiu, D. M. H. Walker, We...
CSCLP
2004
Springer
14 years 3 months ago
Automatically Exploiting Symmetries in Constraint Programming
We introduce a framework for studying and solving a class of CSP formulations. The framework allows constraints to be expressed as linear and nonlinear equations, then compiles th...
Arathi Ramani, Igor L. Markov
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
Jia Di, Jiann S. Yuan
DAC
2003
ACM
14 years 3 months ago
Test application time and volume compression through seed overlapping
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
ISLPED
2003
ACM
113views Hardware» more  ISLPED 2003»
14 years 3 months ago
Reducing power density through activity migration
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
Seongmoo Heo, Kenneth C. Barr, Krste Asanovic