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CASES
2008
ACM
13 years 12 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
13 years 10 months ago
Practical Monte-Carlo based timing yield estimation of digital circuits
—The advanced sampling and variance reduction techniques as efficient alternatives to the slow crude-MC method have recently been adopted for the analysis of timing yield in dig...
Javid Jaffari, Mohab Anis
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 3 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
KGC
1997
Springer
14 years 2 months ago
Looking for an Analogue of Rice's Theorem in Circuit Complexity Theory
Rice’s Theorem says that every nontrivial semantic property of programs is undecidable. In this spirit we show the following: Every nontrivial absolute (gap, relative) counting p...
Bernd Borchert, Frank Stephan
ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
14 years 2 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes