871 search results - page 28 / 175 » Streaming Reduction Circuit |
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
ASPDAC
2010
ACM
13 years 8 months ago
2010
ACM
In this paper, we propose a new wideband model order reduction method for interconnect circuits by using a novel adaptive sampling and error estimation scheme. We try to address t...
SIGMOD
2010
ACM
14 years 2 months ago
2010
ACM
Field-programmable gate arrays (FPGAs) are a promising technology that can be used in database systems. In this demonstration we show Glacier, a library and a compiler that can be...
DAC
2004
ACM
14 years 10 months ago
2004
ACM
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
CORR
2002
Springer
13 years 9 months ago
2002
Springer
-- This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power r...