Sciweavers

871 search results - page 50 / 175
» Streaming Reduction Circuit
Sort
View
DAC
2005
ACM
13 years 12 months ago
A design platform for 90-nm leakage reduction techniques
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
Philippe Royannez, Hugh Mair, Franck Dahan, Mike W...
INFOCOM
1997
IEEE
14 years 2 months ago
Exploiting the Temporal Structure of MPEG Video for the Reduction of Bandwidth Requirements
We propose a new bandwidth allocation scheme for VBR video tra c in ATM networks. The scheme is tailored to MPEG-coded video sources that require stringent and deterministic quali...
Marwan Krunz, Satish K. Tripathi
HPCA
2003
IEEE
14 years 10 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
GLVLSI
2009
IEEE
123views VLSI» more  GLVLSI 2009»
14 years 4 months ago
Power efficient tree-based crosslinks for skew reduction
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
Inna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G...
ISQED
2005
IEEE
78views Hardware» more  ISQED 2005»
14 years 3 months ago
Staggered Twisted-Bundle Interconnect for Crosstalk and Delay Reduction
Abstract— To achieve small delay and low crosstalk for multiple signal nets with capacitive and inductive coupling, we propose in this paper a novel interconnect structure, stagg...
Hao Yu, Lei He