In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
A workshop on Network Analysis and Visualisation was held on September 11, 2005 in Limerick Ireland, in conjunction with 2005 Graph Drawing conference. This report review the backg...
Virtual Private Network Design is the following NP-hard problem. We are given a communication network, represented as a weighted graph with thresholds on the nodes which represent...
Friedrich Eisenbrand, Fabrizio Grandoni, Gianpaolo...