Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
This paper evaluates several techniques to save leakage in CMP L2 caches by selectively switching off the less used lines. We primarily focus on private snoopy L2 caches. In this c...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...