788 search results - page 8 / 158 » Symbolic Equivalence Checking |
DSD
2004
IEEE
14 years 15 days ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
RISE
2004
Springer
14 years 2 months ago
2004
Springer
In this paper, we develop a symbolic representation for timed concurrent constraint (tccp) programs, which can be used for defining a lightweight model–checking algorithm for re...
ENTCS
2008
13 years 8 months ago
2008
In the book on Advanced Topics in Types and Programming Languages, Crary illustrates the reasoning technique of logical relations in a case study about equivalence checking. He pr...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
Abstract—Behavioral synthesis is the compilation of an Electronic system-level (ESL) design into an RTL implementation. We present a suite of optimizations for equivalence checki...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—Checking the equivalence of a system-level model against an RTL design is a major challenge. The reason is that usually the system-level model is written by a system architect, ...