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ASPDAC
2009
ACM
255views Hardware» more  ASPDAC 2009»
14 years 3 months ago
A low-power FPGA based on autonomous fine-grain power-gating
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
Shota Ishihara, Masanori Hariyama, Michitaka Kamey...
INFOCOM
2007
IEEE
14 years 3 months ago
A Cross-Layer Architecture to Exploit Multi-Channel Diversity with a Single Transceiver
—The design of multi-channel multi-hop wireless mesh networks is centered around the way nodes synchronize when they need to communicate. However, existing designs are confined ...
Jay A. Patel, Haiyun Luo, Indranil Gupta
PPL
2008
94views more  PPL 2008»
13 years 9 months ago
Self-Stabilizing Graph Protocols
We provide self-stabilizing algorithms to obtain and maintain a maximal matching, maximal independent set or minimal dominating set in a given system graph. They converge in linea...
Wayne Goddard, Stephen T. Hedetniemi, David Pokras...
DEDS
2002
106views more  DEDS 2002»
13 years 9 months ago
Efficient Computation and Representation of Large Reachability Sets for Composed Automata
We propose an approach that integrates and extends known techniques from different areas to handle and analyze a complex and large system described as a network of synchronized com...
Peter Buchholz, Peter Kemper
NOCS
2010
IEEE
13 years 7 months ago
Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs
Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...