171 search results - page 17 / 35 » Synthesis of Efficient Linear Test Pattern Generators |
OOPSLA
2010
Springer
13 years 7 months ago
2010
Springer
Given a high-level specification and a low-level programming language, our goal is to automatically synthesize an efficient program that meets the specification. In this paper,...
VLSISP
2008
13 years 9 months ago
2008
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
ETS
2006
IEEE
14 years 3 months ago
2006
IEEE
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
DAC
2000
ACM
14 years 10 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
DATE
1998
IEEE
14 years 1 months ago
1998
IEEE
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...