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» Synthesis of Fault-Tolerant Embedded Systems
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EUROMICRO
1999
IEEE
13 years 12 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
CAV
2010
Springer
227views Hardware» more  CAV 2010»
13 years 5 months ago
Breach, A Toolbox for Verification and Parameter Synthesis of Hybrid Systems
We describe Breach, a Matlab toolbox providing a coherent set of simulation-based techniques aimed at the analysis of deterministic models of hybrid dynamical systems. The primary ...
Alexandre Donzé
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
14 years 26 days ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 12 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
DAC
1994
ACM
13 years 11 months ago
Software Scheduling in the Co-Synthesis of Reactive Real-Time Systems
Existing software scheduling techniques limit the functions that can be implemented in software to those with a restricted class of timing constraints, in particular those with a c...
Pai H. Chou, Gaetano Borriello