Sciweavers

328 search results - page 51 / 66
» Synthesis of Fault-Tolerant Embedded Systems
Sort
View
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
14 years 1 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
HICSS
2007
IEEE
120views Biometrics» more  HICSS 2007»
14 years 1 months ago
A Model-Based Approach for Platform-Independent Binary Components with Precise Timing and Fine-Grained Concurrency
Fine grained concurrency and accurate timing can be essential for embedded hardware and software systems. These requirements should be reflected in the specification and must be c...
Tim Schattkowsky, Gregor Engels, Alexander Fö...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 12 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
CODES
2006
IEEE
14 years 1 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
IESS
2007
Springer
128views Hardware» more  IESS 2007»
14 years 1 months ago
An Interactive Design Environment for C-based High-Level Synthesis
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...