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» Synthesis of Fault-Tolerant Embedded Systems
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IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 1 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
DATE
2010
IEEE
183views Hardware» more  DATE 2010»
13 years 6 months ago
Toward optimized code generation through model-based optimization
—Model-Based Development (MBD) provides an al level of abstraction, the model, which lets engineers focus on the business aspect of the developed system. MBD permits automatic tr...
Asma Charfi, Chokri Mraidha, Sébastien G&ea...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 2 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
CASES
2005
ACM
13 years 9 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
14 years 1 months ago
An Organic Computing architecture for visual microprocessors based on Marching Pixels
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...
Dietmar Fey, Marcus Komann, Frank Schurz, Andreas ...