87 search results - page 3 / 18 » Synthesis of Testable RTL Designs |
IESS
2007
Springer
14 years 3 months ago
2007
Springer
: Much effort in RTL design has been devoted to developing “push-button” types of tools. However, given the highly complex nature, and lack of control on RTL design, push-butt...
WCE
2007
13 years 11 months ago
2007
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
ISCAS
2003
IEEE
14 years 3 months ago
2003
IEEE
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
INTEGRATION
2006
13 years 9 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
DAC
1998
ACM
14 years 2 months ago
1998
ACM
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...