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ASAP
1997
IEEE
92views Hardware» more  ASAP 1997»
13 years 11 months ago
Optimized software synthesis for synchronous dataflow
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward...
CODES
2001
IEEE
13 years 11 months ago
Evaluating register file size in ASIP design
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, P...
CODES
2006
IEEE
13 years 11 months ago
Application specific forwarding network and instruction encoding for multi-pipe ASIPs
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswar...
CODES
2003
IEEE
14 years 29 days ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
SCOPES
2004
Springer
14 years 1 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys