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» Synthesis of networks on chips for 3D systems on chips
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DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 7 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
14 years 29 days ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
14 years 20 days ago
Protocol Transducer Synthesis using Divide and Conquer approach
One of the efficient design methodologies for large scale System on a Chip (SoC) is IP-based design. In this methodology, a system is considered as a set of components and intercon...
Shigeru Watanabe, Kenshu Seto, Y. Ishikawa, Satosh...
CODES
2006
IEEE
14 years 12 days ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
AINA
2005
IEEE
14 years 2 months ago
Grouping Proof for RFID Tags
An RFID tag is a small and cheap device which is combined in IC chip and an antenna for radio communications. The tag is used for management of goods and its distribution. Moreove...
Junichiro Saito, Kouichi Sakurai