419 search results - page 62 / 84 » Synthesis of networks on chips for 3D systems on chips |
DSN
2005
IEEE
14 years 2 months ago
2005
IEEE
1 In sub-micron technology circuits high integration levels coupled with the increased sensitivity to soft errors even at ground level make the task of guaranteeing systems’ depe...
DAC
2006
ACM
13 years 10 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
INFOCOM
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...