419 search results - page 67 / 84 » Synthesis of networks on chips for 3D systems on chips |
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
CASES
2008
ACM
13 years 10 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
MICRO
2006
IEEE
14 years 2 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...