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» Synthesis of networks on chips for 3D systems on chips
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ANCS
2009
ACM
13 years 6 months ago
LaFA: lookahead finite automata for scalable regular expression detection
Although Regular Expressions (RegExes) have been widely used in network security applications, their inherent complexity often limits the total number of RegExes that can be detec...
Masanori Bando, N. Sertac Artan, H. Jonathan Chao
DAC
2000
ACM
14 years 9 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 9 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 18 days ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
14 years 10 days ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli