10159 search results - page 82 / 2032 » System Design Validation Using Formal Models |
RTCSA
2006
IEEE
14 years 2 months ago
2006
IEEE
The modeling approach is not used to its full potential in maintenance of legacy systems. Often, models do not even exist. The main reasons being that the economic implications an...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
With the term flexibility, we introduce a new design dimension of an embedded system that quantitatively characterizes its feasibility in implementing not only one, but possibly ...
ICAT
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper describes the use of Virtual Reality to aid in the design, validation and user training of a gesture and vocal interface. The interface system sends commands to a conta...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
Practitioners of formal property verification often work around the capacity limitations of formal verification tools by breaking down properties into smaller properties that ca...