4887 search results - page 51 / 978 » System Level Design Using C |
ISLPED
2003
ACM
15 years 9 months ago
2003
ACM
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...
165
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IESS
2007
Springer
15 years 10 months ago
2007
Springer
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
131
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WSC
2004
15 years 5 months ago
2004
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
126
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FDL
2005
IEEE
15 years 9 months ago
2005
IEEE
This paper outlines some fundamental concepts for the development of a system design framework based on standard notations and common CASE tools. We describe an environment for HW...
135
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PADL
2004
Springer
15 years 9 months ago
2004
Springer
We describe the current status of and provide performance results for a prototype compiler of Prolog to C, ciaocc. ciaocc is novel in that it is designed to accept different kinds...