Sciweavers

452 search results - page 55 / 91
» System Level Hardware-Software Design Exploration with XCS
Sort
View
ICCAD
2009
IEEE
121views Hardware» more  ICCAD 2009»
13 years 6 months ago
MOLES: Malicious off-chip leakage enabled by side-channels
Economic incentives have driven the semiconductor industry to separate design from fabrication in recent years. This trend leads to potential vulnerabilities from untrusted circui...
Lang Lin, Wayne Burleson, Christof Paar
CODES
2007
IEEE
14 years 28 days ago
A computational reflection mechanism to support platform debugging in SystemC
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
Bruno Albertini, Sandro Rigo, Guido Araujo, Cristi...
CODES
2009
IEEE
14 years 3 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
SIGOPS
2011
215views Hardware» more  SIGOPS 2011»
13 years 4 months ago
Log-based architectures: using multicore to help software behave correctly
While application performance and power-efficiency are both important, application correctness is even more important. In other words, if the application is misbehaving, it is li...
Shimin Chen, Phillip B. Gibbons, Michael Kozuch, T...
CSMR
2003
IEEE
14 years 2 months ago
Software Clustering Techniques and the Use of Combined Algorithm
As the age of software systems increases they tend to deviate from their actual design and architecture. It becomes more and more difficult to manage and maintain such systems. We...
M. Saeed, Onaiza Maqbool, Haroon A. Babri, Syed Za...