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» System level design, a VHDL based approach
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CL
2010
Springer
15 years 6 months ago
SystemJ: A GALS language for system level design
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
Avinash Malik, Zoran Salcic, Partha S. Roop, Alain...
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
16 years 19 days ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
DFT
2003
IEEE
145views VLSI» more  DFT 2003»
15 years 11 months ago
System-Level Analysis of Fault Effects in an Automotive Environment
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
Fulvio Corno, S. Tosato, P. Gabrielli
CODES
2007
IEEE
16 years 7 days ago
Combined approach to system level performance analysis of embedded systems
Compositional approaches to system-level performance analysis have shown great flexibility and scalability in the design of heterogeneous systems. These approaches often assume c...
Simon Künzli, Arne Hamann, Rolf Ernst, Lothar...
ISQED
2007
IEEE
104views Hardware» more  ISQED 2007»
16 years 5 days ago
System Level Estimation of Interconnect Length in the Presence of IP Blocks
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
Taraneh Taghavi, Ani Nahapetian, Majid Sarrafzadeh