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DATE
2006
IEEE
102views Hardware» more  DATE 2006»
14 years 1 months ago
Faster exploration of high level design alternatives using UML for better partitions
Partitioning is a time consuming and computationally complex optimization problem in the codesign of hardware software systems. The stringent time-to-market requirements have resu...
Waseem Ahmed, Doug Myers
ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
13 years 11 months ago
Fast and Extensive System-Level Memory Exploration for ATM Applications
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
Peter Slock, Sven Wuytack, Francky Catthoor, Gjalt...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 9 days ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
CODES
2007
IEEE
14 years 1 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
CODES
2006
IEEE
14 years 1 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...