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» System synthesis utilizing a layered functional model
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GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
15 years 9 months ago
Mixing ATPG and property checking for testing HW/SW interfaces
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
Alessandro Fin, Franco Fummi, Graziano Pravadelli
CASES
2004
ACM
15 years 9 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
15 years 1 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
16 years 22 days ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...

Publication
181views
14 years 12 months ago
Causality Applicatoin Ontology: A Therory of Definition Derived From Analytical Meditation
Advancing the synthesis of Eastern mind science with Western physical science will require a robust and easy-to-traverse bridge between the atypical apprehensions within meditation...
Samuel R Dismond III