Abstract--More and more embedded systems provide a multitude of services, implemented by a large number of networked hardware components. In early design phases, dimensioning such ...
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
— With the rise in complexity of modern systems, designers are spending a significant time on at the system level of abstraction. This paper introduces Model Algebra, a formalis...
Abstract— As the semiconductor technology continues its marching toward the deep sub-micron domain, the strong relation between leakage current and temperature becomes critical i...