93 search results - page 9 / 19 » System-level memory modeling for bus-based memory architectu... |
TECS
2008
13 years 8 months ago
2008
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
DAC
2003
ACM
2003
ACM
A complexity effective communication model for behavioral modeling of signal processing applications
14 years 9 months ago
In this paper, we argue that the address space of memory regions that participate in inter task communication is over-specified by the traditional communication models used in beh...
PATMOS
2000
Springer
14 years 4 days ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
DAC
1997
ACM
14 years 22 days ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
CODES
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....