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DAC
2010
ACM
13 years 7 months ago
QuickYield: an efficient global-search based parametric yield estimation with performance constraints
With technology scaling down to 90nm and below, many yield-driven design and optimization methodologies have been proposed to cope with the prominent process variation and to incr...
Fang Gong, Hao Yu, Yiyu Shi, Daesoo Kim, Junyan Re...
ISLPED
2003
ACM
142views Hardware» more  ISLPED 2003»
14 years 19 days ago
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization
We describe an optimization strategy for minimizing total power consumption using dual threshold voltage (Vth) technology. Significant power savings are possible by simultaneous a...
David Nguyen, Abhijit Davare, Michael Orshansky, D...
ISPD
2009
ACM
126views Hardware» more  ISPD 2009»
14 years 2 months ago
A new algorithm for simultaneous gate sizing and threshold voltage assignment
Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven h...
Yifang Liu, Jiang Hu
DAC
2005
ACM
13 years 9 months ago
Partitioning-based approach to fast on-chip decap budgeting and minimization
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
GECCO
2004
Springer
125views Optimization» more  GECCO 2004»
14 years 23 days ago
An Island-Based GA Implementation for VLSI Standard-Cell Placement
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
Guangfa Lu, Shawki Areibi