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» Teaching System-Level Design Using SpecC and SystemC
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MODELS
2009
Springer
14 years 1 months ago
Teaching Modeling: Why, When, What?
This paper reports on a panel discussion held during the Educators’ Symposium at MODELS’2009. It shortly explains the context provided for the discussion and outlines the state...
Jean Bézivin, Robert France, Martin Gogolla...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 1 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
14 years 8 days ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
MTV
2005
IEEE
128views Hardware» more  MTV 2005»
14 years 2 months ago
Automated Extraction of Structural Information from SystemC-based IP for Validation
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large p...
David Berner, Hiren D. Patel, Deepak Mathaikutty, ...
SAC
2003
ACM
14 years 1 months ago
ARCHITECT-R: A System for Reconfigurable Robots Design
An increasing interest in the design of mobile robots has been observed in recent years, which is mainly motivated by technological advances that may allow their application to co...
R. A. Gonçalves, P. A. Moraes, João ...