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ICES
2001
Springer
140views Hardware» more  ICES 2001»
15 years 8 months ago
A VLSI Implementation of an Analog Neural Network Suited for Genetic Algorithms
The usefulness of an artificial analog neural network is closely bound to its trainability. This paper introduces a new analog neural network architecture using weights determined...
Johannes Schemmel, Karlheinz Meier, Felix Schü...
ISCAS
1999
IEEE
126views Hardware» more  ISCAS 1999»
15 years 8 months ago
Synthesis of multiple-input translinear element networks
We describe two systematic procedures for synthesizing mutlipleinput translinear element (MITE) networks that produce an output current that is equal to product of a number of inp...
Bradley A. Minch, Paul E. Hasler, Chris Diorio
ICCAD
1995
IEEE
108views Hardware» more  ICCAD 1995»
15 years 7 months ago
Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels
This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number o...
Haifang Liao, Wayne Wei-Ming Dai
DATE
2005
IEEE
109views Hardware» more  DATE 2005»
15 years 9 months ago
Design Method for Constant Power Consumption of Differential Logic Circuits
Side channel attacks are a major security concern for smart cards and other embedded devices. They analyze the variations on the power consumption to find the secret key of the en...
Kris Tiri, Ingrid Verbauwhede
ECBS
2006
IEEE
116views Hardware» more  ECBS 2006»
15 years 6 months ago
WSN-based Intelligent Telematics System
With the wireless communication network and location data, the existing telematics system provides various information services such as navigation, emergency service, and etc. In ...
Jung-sick Byun, Woo-Suk Shim, Won-Kee Hong