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ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...
Henry H. Y. Chan, Zeljko Zilic
ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Total power optimization combining placement, sizing and multi-Vt through slack distribution management
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...
Tao Luo, David Newmark, David Z. Pan
DAC
2003
ACM
14 years 21 days ago
Symbolic analysis of analog circuits with hard nonlinearity
A new methodology is presented to solve a strongly nonlinear circuit, characterized by Piece-Wise Linear (PWL) functions, symbolically and explicitly in terms of its circuit param...
Alicia Manthe, Zhao Li, C.-J. Richard Shi
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
DAC
2003
ACM
14 years 8 months ago
Support vector machines for analog circuit performance representation
The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parame...
Fernando De Bernardinis, Michael I. Jordan, Albert...