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» Techniques for low energy software
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ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
13 years 12 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde
CASES
2004
ACM
14 years 1 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
14 years 4 months ago
Limits on voltage scaling for caches utilizing fault tolerant techniques
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
Mohammad A. Makhzan, Amin Khajeh Djahromi, Ahmed M...
ISVLSI
2006
IEEE
114views VLSI» more  ISVLSI 2006»
14 years 1 months ago
A Low Power Lookup Technique for Multi-Hashing Network Applications
Many network security applications require large virus signature sets to be maintained, retrieved, and compared against the network streams. Software applications frequently fail ...
Ilhan Kaya, Taskin Koçak
ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
13 years 12 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard