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» Technology mapping for domino logic
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DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 17 days ago
Power consumption of logic circuits in ambipolar carbon nanotube technology
Ambipolar devices have been reported in many technologies, including carbon nanotube field effect transistors (CNTFETs). The ambipolarity can be in-field controlled with a secon...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
14 years 1 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
FPGA
1998
ACM
153views FPGA» more  FPGA 1998»
13 years 11 months ago
SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays
It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
Steven J. E. Wilton
DAC
2010
ACM
13 years 11 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich
FPL
1997
Springer
242views Hardware» more  FPL 1997»
13 years 11 months ago
Technology mapping by binate covering
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
Michal Servít, Kang Yi