62 search results - page 5 / 13 » Technology mapping for k m-macrocell based FPGAs |
DAC
1998
ACM
14 years 9 months ago
1998
ACM
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
Technology mapping based on DAG-covering suffers from the problem of structural bias: the structure of the mapped netlist depends strongly on the subject graph. In this paper we ...
ERSA
2004
13 years 9 months ago
2004
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...