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» Temperature-aware global placement
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ICCAD
2006
IEEE
119views Hardware» more  ICCAD 2006»
14 years 4 months ago
FastRoute: a step to integrate global routing into placement
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
Min Pan, Chris C. N. Chu
DAC
2000
ACM
14 years 8 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 4 months ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...
ASPDAC
2004
ACM
116views Hardware» more  ASPDAC 2004»
14 years 24 days ago
Temperature-aware global placement
— This paper describes a deterministic placement method for standard cells which minimizes total power consumption and leads to a smooth temperature distribution over the die. It...
Bernd Obermeier, Frank M. Johannes
ISPD
1997
ACM
68views Hardware» more  ISPD 1997»
13 years 11 months ago
Faster minimization of linear wirelength for global placement
A linear wirelength objective more e ectively captures timing, congestion, and other global placement considerations than a squared wirelength objective. The GORDIAN-L cell placem...
Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...