125 search results - page 19 / 25 » Tera-scale computing and interconnect challenges |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
ASPDAC
2009
ACM
14 years 1 months ago
2009
ACM
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
EDBT
2006
ACM
14 years 7 months ago
2006
ACM
Navigational queries on Web-accessible life science sources pose unique query optimization challenges. The objects in these sources are interconnected to objects in other sources, ...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...