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DAC
2008
ACM
14 years 11 months ago
Parameterized timing analysis with general delay models and arbitrary variation sources
Many recent techniques for timing analysis under variability, in which delay is an explicit function of underlying parameters, may be described as parameterized timing analysis. T...
Khaled R. Heloue, Farid N. Najm
DAC
2008
ACM
14 years 11 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
DAC
2008
ACM
14 years 11 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
DAC
2002
ACM
14 years 11 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DAC
2004
ACM
14 years 11 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd