203 search results - page 29 / 41 » Test Generation and Fault Localization for Quantum Circuits |
IFIP
2001
Springer
13 years 12 months ago
2001
Springer
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
ITC
1997
IEEE
13 years 11 months ago
1997
IEEE
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests for them is becoming a serious problem in industry. This paper...
TCAD
2008
13 years 7 months ago
2008
Abstract--A key design constraint of circuits used in handheld devices is the power consumption, mainly due to battery life limitations. Adaptive power management (APM) techniques ...
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Recently, there is a renewed interest in Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT). This results from the availability of very powerful SA...