1016 search results - page 3 / 204 » Test Generation for Designs with On-Chip Clock Generators |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
DAC
2003
ACM
14 years 25 days ago
2003
ACM
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
ASAP
2003
IEEE
14 years 26 days ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
IMS
2000
13 years 11 months ago
2000
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....