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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICALT
2008
IEEE
14 years 2 months ago
An Intelligent Engine for the Generation of Adaptive Tutorials
The goal of this work is the design and construction of adaptive tutorials based on the application of algorithms for the automatic resolution of problems which can be used to aut...
Tomás Álvarez, Carmen Escribano, Dan...
WMC
2004
224views ECommerce» more  WMC 2004»
13 years 9 months ago
Evaluation Framework for a Mobile Marketing Application in 3rd Generation Networks
: Testing of a software application serves the accomplishment of two dis tinct objectives: ensuring functionality and end-user acceptance. However, with an increasing desire for mo...
Franz Lehner, Eva-Maria Sperger, Holger Nösek...
ICST
2008
IEEE
14 years 2 months ago
Designing and Building a Software Test Organization
–Abstract for conference - preliminary Model-Based Testing: Models for Test Cases Jan Tretmans, Embedded Systems Institute, Eindhoven : Systematic testing of software plays an im...
Bruce Benton
DAC
2000
ACM
14 years 8 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski