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FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 3 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
ATVA
2005
Springer
111views Hardware» more  ATVA 2005»
14 years 2 months ago
Model Checking Prioritized Timed Automata
Abstract. Priorities are often used to resolve conflicts in timed systems. However, priorities are not directly supported by state-of-art model checkers. Often, a designer has to ...
Shang-Wei Lin, Pao-Ann Hsiung, Chun-Hsian Huang, Y...
WPES
2003
ACM
14 years 2 months ago
Privacy preserving database application testing
Traditionally, application software developers carry out their tests on their own local development databases. However, such local databases usually have only a small number of sa...
Xintao Wu, Yongge Wang, Yuliang Zheng
TVLSI
2008
121views more  TVLSI 2008»
13 years 9 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
DAC
2007
ACM
14 years 10 months ago
Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang