As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
This paper presents the design of a middleware approach that aims at assisting handheld devices in accessing Grid services by wrapping the computational and resource intensive task...
Maria Riaz, Saad Liaquat Kiani, Anjum Shehzad, Sun...
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
In recent years, the X-Architecture is introduced to obtain better performance for integrated circuit physical design. This paper reformulates the global routing problem in X-Archi...